DAC Day Three: UVM, Machine Learning And DFT Come Together

System-Level Design OPINION An action packed day at DAC where all extremes of the EDA problem space can be covered under one roof. The industry and users have a love/hate relationship with UVM. It has quickly risen to become the most used verification methodology and yet at the same time it is seen as being overly complex, unwieldy and difficult to learn. The third day of DAC gets started with breakfast with Accellera to discuss UVM and what we can expect to see in the next 5 years. The discussion was led by Tom Alsop, principle engineer at Intel. Alsop’s first question to the panelists was, where do you see UVM in the next 5 years? Warren Stapleton, senior fellow at AMD said that we are here because of its…


Link to Full Article: DAC Day Three: UVM, Machine Learning And DFT Come Together