Blog Review: Oct. 12

System-Level Design Verification technology adoption; portable stimulus goals; Type-C; 7nm challenges; von Neumann limitations; FPGAs & IoT; IoT hubs; RF cooking. Mentor’s Harry Foster digs into verification technology adoption trends for ASIC/IC. Cadence’s Tom Anderson looks at the goals of the Portable Stimulus Working Group and how they compare to those of UVM. Synopsys’ Eric Huang checks out what’s new in the land of USB, Type-C adoption, and cable testing. Ansys’ Aveek Sarkar explores the challenges facing 7nm designs and the benefits of chip-package-system flows and methodologies. Rambus’ Aharon Etengoff digs into the limitations of the von Neumann architecture and the role of FPGAs in bringing architectures back into balance. Meanwhile, Aldec’s Zibi Zalewski looks at how FPGAs fit into IoT gateway and infrastructure. Altera’s Ron Wilson investigates two very…


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